Journal Publications

  • [TPAMI] Wei Niu*, Zhengang Li*, Xiaolong Ma, Peiyan Dong, Gang Zhou, Xuehai Qian, Xue Lin, Yanzhi Wang, Bin Ren, “GRIM: A General, Real-Time Deep Learning Inference Framework for Mobile Devices based on Fine-Grained Structured Weight Sparsity”, in Proceedings of the IEEE Transactions on Pattern Analysis and Machine Intelligence (Impact Factor 17.861), 2021.
  • [Featured Article][CACM] Shaoshan Liu, Xiaolong Ma, Wei Niu, Bin Ren, Xipeng Shen, Yanzhi Wang, Pu Zhao, “CoCoPIE: Making Mobile AI Sweet As PIE — Compression-Compilation Co-Design Goes a Long Way” in the Communications of the ACM, 2021. (authors in alphabetical order)
  • [TNNLS] Xiaolong Ma*, Sheng Lin*, Shaokai Ye, Zhezhi He, Linfeng Zhang, Geng Yuan, Sia Huat Tan, Zhengang Li, Deliang Fan, Xuehai Qian, Xue Lin, Kaisheng Ma, Yanzhi Wang, “Rethinking the Value of DNN Weight Sparsity on Hardware: Is It Truly Beneficial?”, in Proceedings of the IEEE Transactions on Neural Networks and Learning Systems (Impact Factor 8.793), 2021.
  • [TNNLS] Tianyun Zhang, Shaokai Ye, Kaiqi Zhang, Xiaolong Ma, Ning Liu, Linfeng Zhang, Jian Tang, Kaisheng Ma, Xue Lin, Makan Fardad, Yanzhi Wang, “StructADMM: A Systematic, High-Efficiency Framework of Structured Weight Pruning for DNNs”, in Proceedings of the IEEE Transactions on Neural Networks and Learning Systems (Impact Factor 8.793), 2020.

Conference publications

  • [22′ FPGA] Mengshu Sun, Zhengang Li, Alec Lu, Yanyu Li, Sung-En Chang, Xiaolong Ma, Xue Lin, Zhenman Fang, “FILM-QNN: Efficient FPGA Acceleration of Deep Neural Networks with Intra-Layer, Mixed-Precision Quantization”, will appear in Proceedings of the International Symposium on Field-Programmable Gate Arrays (FPGA, 2022).
  • [21′ NeurIPS] Xiaolong Ma*, Geng Yuan*, Xuan Shen, Tianlong Chen, Xuxi Chen, Xiaohan Chen, Ning Liu, Minghai Qin, Sijia Liu, Zhangyang Wang, Yanzhi Wang, “Sanity Checks for Lottery Tickets: Does Your Winning Ticket Really Win the Jackpot?”, in Proceedings of the 35th Conference on Neural Information Processing Systems (NeurIPS, 2021).
  • [21′ NeurIPS – Spotlight] Geng Yuan*, Xiaolong Ma*, Wei Niu, Zhengang Li, Zhenglun Kong, Ning Liu, Yifan Gong, Zheng Zhan, Chaoyang He, Qing Jin, Siyue Wang, Minghai Qin, Bin Ren, Yanzhi Wang, Sijia Liu, Xue Lin, “MEST: Accurate and Fast Memory-Economic Sparse Training Framework on the Edge”, in Proceedings of the 35th Conference on Neural Information Processing Systems (NeurIPS, 2021).
  • [21′ ICML] Ning Liu*, Geng Yuan*, Zhengping Che, Xuan Shen, Xiaolong Ma, Qing Jin, Jian Ren, Jian Tang, Sijia Liu, Yanzhi Wang, “Lottery Ticket Preserves Weight Correlation: Is It Desirable or Not?”, in Proceedings of the 38th International Conference on Machine Learning (ICML, 2021).
  • [21′ IJCAI demo] Xuan Shen*, Geng Yuan*, Wei Niu, Xiaolong Ma, Jiexiong Guan, Zhengang Li, Bin Ren, Yanzhi Wang, “Towards Fast and Accurate Multi-Person Pose Estimation on Mobile Devices”, in Proceedings of the 30th International Joint Conference on Artificial Intelligence (IJCAI-21) Demonstrations Track.
  • [21′ ISCA] Geng Yuan, Payman Behnam, Zhengang Li, Ali Shafiei, Sheng Lin, Xiaolong Ma, Hang Liu, Xuehai Qian, Mahdi Nazm Bojnordi, Yanzhi Wang, Caiwen Ding, “FORMS: Fine-grained Polarized ReRAM-based In-situ Computation for Mixed-Signal DNN Accelerator”, in Proceedings of the 48th International Symposium on Computer Architecture (ISCA, 2021).
  • [21′ DAC] Tianyun Zhang, Xiaolong Ma, Zheng Zhan, Shaokai Ye, Kaidi Xu, Bingbing Li, Xiaolin Xu, Sijia Liu, Qinru Qiu, Makan Fardad, Xue Lin and Caiwen Ding, “A Unified DNN Pruning Weight Framework Using Reweighted Method”, in Proceedings of the 58th Design Automation Conference (DAC 2021).
  • [21′ ISQED] Geng Yuan, Zhiheng Liao, Xiaolong Ma, Yuxuan Cai, Zhenglun Kong, Xuan Shen, Jingyan Fu, Zhengang Li, Chengming Zhang, Hongwu Peng, Ning Liu, Ao Ren, Jinhui Wang, Yanzhi Wang, “Improving DNN Fault Tolerance using Weight Pruning and Differential Crossbar Mapping for ReRAM-based Edge AI”, in Proceedings of the 22th International Symposium on Quality Electronic Design (ISQED 2021).
  • [21’DATE] Geng Yuan, Payman Behnam, Yuxuan Cai, Ali Shafiee, Jingyan Fu, Zhiheng Liao, Zhengang Li, Xiaolong Ma, Jieren Deng, Jinhui Wang, Mahdi Bojnordi, Yanzhi Wang, Caiwen Ding, “TinyADC: Peripheral Circuit-aware Weight Pruning Framework for Mixed-signal DNN Accelerators”, in Proceedings of the Design, Automation and Test in Europe Conference (DATE 2021).
  • [20’GLSVLSI] Yifan Gong, Zheng Zhan, Zhengang Li, Wei Niu, Xiaolong Ma, Wenhao Wang, Bin Ren, Caiwen Ding, Xue Lin, Xiaolin Xu, Yanzhi Wang, “A Privacy-Preserving-Oriented DNN Pruning and Mobile Acceleration Framework”, in Proceedings of the 2020 on Great Lakes Symposium on VLSI (GLVLSI 2020).
  • [20’SOCC] Geng Yuan*, Xiaolong Ma*, Sheng Lin, Zhengang Li, Jieren Deng, Caiwen Ding, “A DNN Compression Framework for SOT-MRAM-Based Processing-In-Memory Engine”, in Proceeding of the 33rd IEEE International System-on-chip Conference (SOCC 2020).
  • [20’PACT] Masuma Akter Rumi, Xiaolong Ma, Yanzhi Wang, Peng Jiang, “Accelerating Sparse CNN Inference on GPUs with Performance-Aware Weight Pruning”, in Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT 2020, acceptance rate: 25%).
  • [20’ECCV] Xiaolong Ma*, Wei Niu*, Tianyun Zhang, Sijia Liu, Sheng Lin, Hongjia Li, Xiang Chen, Jian Tang, Kaisheng Ma, Bin Ren, Yanzhi Wang, “An Image Enhancing Pattern-based Sparsity for Real-time Inference on Mobile Devices”, in Proceedings of the 16th European Conference on Computer Vision (ECCV 2020, acceptance rate: 27%).
  • [20’ICS] Runbin Shi, Peiyan Dong, Tong Geng, Yuhao Ding, Xiaolong Ma, Martin Herbordt, Ang Li, Hayden So, and Yanzhi Wang, “CSB-RNN: A Faster-than-Realtime RNN Acceleration Framework with Compressed Structured Blocks”, in Proceeding of the International Conference on Supercomputing (ICS 2020).
  • [Under review] Xiaolong Ma*, Zhengang Li*, Yifan Gong, Tianyun Zhang, Wei Niu, Zheng Zhan, Pu Zhao, Jian Tang, Xue Lin, Bin Ren, Yanzhi Wang, “BLK-REW: A Unified Block-based Pruning Framework using Reweighted Regularization Method”, (arXiv).
  • [Under review] Zhengang Li*, Yifan Gong*, Xiaolong Ma, Sijia Liu, Mengshu Sun, Zheng Zhan, Zhenglun Kong, Geng Yuan, Yanzhi Wang, “SS-Auto: A Single-Shot, Automatic Structured Weight Pruning Framework of DNNs with Ultra-High Efficiency”, (arXiv).
  • [20’AAAI] Xiaolong Ma*, Fuming Guo*, Wei Niu, Xue Lin, Jian Tang, Kaisheng Ma, Bin Ren, Yanzhi Wang, “PCONV: The Missing but Desirable Sparsity in DNN Weight Pruning for Real-time Execution on Mobile Devices”, in Proceedings of the 34th AAAI Conference on Artificial Intelligence (AAAI 2020, acceptance rate: 20.6%).
  • [20’AAAI] Ning Liu, Xiaolong Ma, Zhiyuan Xu, Yanzhi Wang, Jian Tang, Jieping Ye, “AutoSlim: An Automatic DNN Structured Pruning Framework for Ultra-High Compression Rates”, in Proceedings of the 34th AAAI Conference on Artificial Intelligence (AAAI 2020, acceptance rate: 20.6%).
  • [20’ASPLOS] Wei Niu, Xiaolong Ma, Sheng Lin, Shihao Wang, Xuehai Qian, Xue Lin, Yanzhi Wang, Bin Ren, “PatDNN: Achieving Real-Time DNN Execution on Mobile Devices with Pattern-based Weight Pruning”, in Proceedings of the 24th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2020, acceptance rate: 18.07%).
  • [20’DAC] Zhanhong Tan, Jiebo Song, Xiaolong Ma, Sia-Huat Tan, Hongyang Chen, Shaokai Ye, Yanzhi Wang, Kaisheng Ma, “PCNN: Pattern-based Fine-Grained Regular Pruning towards Optimizing CNN Accelerators”, in Proceedings of the 57th Annual Design Automation Conference (DAC 2020).
  • [20’DAC] Chaoqun Chu, Yanzhi Wang, Yilong Zhao, Xiaolong Ma, Shaokai Ye, Yunyan Hong, Xiaoyao Liang, Yinhe Han, Yun Chen, Xiaosong Cui, and Li Jiang, “PIM-Prune: Fine-Grain DCNN pruning for Crossbar-based Process-In-Memory architecture”, in Proceedings of the 57th Annual Design Automation Conference (DAC 2020).
  • [20’ASP-DAC] Xiaolong Ma*, Geng Yuan*, Sheng Lin, Caiwen Ding, Fuxun Yu, Tao Liu, Wujie Wen, Xiang Chen, Yanzhi Wang, “Tiny but Accurate: A Pruned, Quantized and Optimized Framework of an Ultra Efficient DNN Device”, in 25th Asia and South Pacific Design Automation Conference (ASP-DAC, 2020).
  • [20’ASP-DAC] Xiaolong Ma, Zhe Li, Hongjia Li, Qiyuan An, Wenyao Xu, Qinru Qiu, Yanzhi Wang. “C3PO: Database and Benchmark for Early-stage Malicious Activity Detection in 3D Printing”, in in 25th Asia and South Pacific Design Automation Conference (ASP-DAC, 2020).
  • [19’ISVLSI] Ruizhe Cai, Xiaolong Ma, Olivia Chen, Ao Ren, Ning Liu, Nobuyuki Yoshikawa, Yanzhi Wang, “IDE Development, Logic Synthesis and Buffer/Splitter Insertion Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits”, in Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI, 2019).
  • [19’GLSVLSI] Hongjia Li, Ning Liu, Xiaolong Ma, Sheng Lin, Shaokai Ye, Tianyun Zhang, Xue Lin, Wenyao Xu, Yanzhi Wang, “ADMM-based Weight Pruning for Real-Time Deep Learning Acceleration on Mobile Devices, in Proceedings of the 2019 on Great Lakes Symposium on VLSI (GLSVLSI, 2019).
  • [19’ISLPED] Geng Yuan*, Xiaolong Ma*, Caiwen Ding, Sheng Lin, Tianyun Zhang, Zeinab S. Jalali, Yilong Zhao, Li Jiang, Sucheta Soundarajan, Yanzhi Wang, “An Ultra-Efficient Memristor-Based DNN Framework with Structured Pruning and Quantization Using ADMM”, (ISLPED, 2019).
  • [19’ICESS] Zhe Li, Xiaolong Ma, Ji Li, Qinru Qiu, Yanzhi Wang, “Efficient Cloud Resource Management using Neuromorphic Modeling and Prediction for Virtual Machine Resource Utilization”, in Proceedings of the 2019 IEEE International Conference on Embedded Software and Systems (ICESS, 2019).
  • [19’NANOARCH] Xiaolong Ma, Geng Yuan, Sheng Lin, Zhengang Li, Yanzhi Wang, “ResNet Can Be Pruned 60x: Introducing Network Purification and Unused Path Removal (P-RM) after Weight Pruning”, in 15th IEEE / ACM International Symposium on Nanoscale Architectures (NANOARCH, 2019).
  • [18’ASC] Olivia Chen, Xiaolong Ma, Yanzhi Wang, Naoki Takeuchi, Nobuyuki Yoshikawa, “Design and Implementation of an Extremely Energy-efficient Deep Learning Accelerator Using Superconducting Logic”, Applied Superconductivity Conference (ASC, 2018).
  • [18’AAAI] Yanzhi Wang, Caiwen Ding, Zhe Li, Geng Yuan, Siyu Liao, Xiaolong Ma, Bo Yuan, Xuehai Qian, Jian Tang, Qinru Qiu, Xue Lin. “Towards ultra-high performance and energy efficiency of deep learning systems: an algorithm-hardware co-optimization framework”, in AAAI Conference on Artificial Intelligence (AAAI, 2018).
  • [18’GLSVLSI] Caiwen Ding, Ao Ren, Geng Yuan, Xiaolong Ma, Jiayu Li, Ning Liu, Bo Yuan, Yanzhi Wang. “Structured Weight Matrices-Based Hardware Accelerators in Deep Neural Networks: FPGAs and ASICs” in Proceedings of the 2018 on Great Lakes Symposium on VLSI. (GLSVLSI, 2018).
  • [17’MICRO] Caiwen Ding, Siyu Liao, Yanzhi Wang, Zhe Li, Ning Liu, Youwei Zhuo, Chao Wang, Xuehai Qian, Yu Bai, Geng Yuan, Xiaolong Ma, Yipeng Zhang, Jian Tang, Qinru Qiu, Xue Lin, Bo Yuan. “CirCNN: accelerating and compressing deep neural networks using block-circulant weight matrices”, in Proceedings of the International Symposium on Microarchitecture (MICRO, 2017).
  • [Best Paper Nomination][17’ISQED] Xiaolong Ma, Yipeng Zhang, Geng Yuan, Ao Ren, Zhe Li, Jie Han, Jingtong Hu, Yanzhi Wang. “An Area and Energy Efficient Design of Domain-Wall Memory-Based Deep Convolutional Neural Networks using Stochastic Computing”, in International Symposium on Quality Electronic Design (ISQED, 2017).
  • [17’MWSCAS] Geng Yuan, Caiwen Ding, Ruizhe Cai, Xiaolong Ma, Ziyi Zhao, Ao Ren, Bo Yuan, Yanzhi Wang. “Memristor crossbar-based ultra-efficient next-generation baseband processors”, in IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS, 2017).

Workshop publications

  • [Best Paper Award][21’HAET] Xiaolong Ma, Zhengang Li, Geng Yuan, Wei Niu, Bin Ren, Yanzhi Wang, Xue Lin, “Memory-Bounded Sparse Training on the Edge”, (ICLR 2021 workshop of Hardware-Aware Efficient Training of Deep Learning Models).
  • [20’BARC] Xiaolong Ma, Wei Niu, Bin Ren, Yanzhi Wang, “A Desirable Sparsity Dimension for Real-time Acceleration”, Boston Area Architecture Workshop BARC, 2020).
  • [19’ODML-CDNNR] Sheng Lin, Xiaolong Ma, Geng Yuan, Shaokai Ye, Kaisheng Ma, Yanzhi Wang, “Toward Extremely Low Bit and Lossless Accuracy in DNNs with Progressive ADMM”, Workshop on On-Device Machine Learning & Compact Deep Neural Network Representations (ICML workshop, 2019).
  • [19’ODML-CDNNR] Wei Niu, Xiaolong Ma, Yanzhi Wang, Bin Ren, “26ms Inference Time for ResNet-50: Towards Real-Time Execution of all DNNs on Smartphone”, Workshop on On-Device Machine Learning & Compact Deep Neural Network Representations (ICML workshop, 2019).